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| MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MMDF2N06VL/D Product Preview TMOS VTM SO-8 for Surface Mount N-Channel Enhancement-Mode Silicon Gate TMOS V is a new technology designed to achieve an on-resistance area product about one-half that of standard MOSFETs. This new technology more than doubles the present cell density of our 50 and 60 volt TMOS devices. Just as with our TMOS E-FET designs, TMOS V is designed to withstand high energy in the avalanche and commutation modes. Designed for low voltage, high speed switching applications in power supplies, converters and power motor controls, these devices are particularly well suited for bridge circuits where diode speed and commutating safe operating areas are critical and offer additional safety margin against unexpected voltage transients. New Features of TMOS V * On-resistance Area Product about One-half that of Standard MOSFETs with New Low Voltage, Low RDS(on) Technology * Faster Switching than E-FET Predecessors G S MMDF2N06VL DUAL TMOS MOSFET 2.5 AMPERES 60 VOLTS RDS(on) = 0.130 OHM TM D CASE 751-05, Style 11 SO-8 Source-1 1 2 3 4 8 7 6 5 Drain-1 Drain-1 Drain-2 Drain-2 Features Common to TMOS V and TMOS E-FETS * Avalanche Energy Specified * IDSS and VDS(on) Specified at Elevated Temperature * Static Parameters are the Same for both TMOS V and TMOS E-FET * Miniature SO-8 Surface Mount Package - Saves Board Space * Mounting Information for SO-8 Package Provided MAXIMUM RATINGS (TJ = 25C unless otherwise noted) Rating Drain-to-Source Voltage Drain-to-Gate Voltage, (RGS = 1 M) Gate-to-Source Voltage -- Continuous Drain Current -- Continuous @ TA = 25C Drain Current -- Continuous @ TA = 100C Drain Current -- Single Pulse (tp 10 s) Total Power Dissipation @ TA = 25C (1) Operating and Storage Temperature Range Single Pulse Drain-to-Source Avalanche Energy -- Starting TJ = 25C (VDD = 25 Vdc, VGS = 5.0 Vdc, Peak IL = 3.3 Apk, L = 10 mH, RG = 25 ) Thermal Resistance, Junction to Ambient (1) Maximum Lead Temperature for Soldering Purposes, 0.0625 from case for 10 seconds Gate-1 Source-2 Gate-2 Top View Symbol VDSS VDGR VGS ID ID IDM PD TJ, Tstg EAS RJA TL Value 60 60 15 2.5 0.5 7.5 2.0 - 55 to 175 54 62.5 260 Unit Vdc Vdc Vdc Adc Apk W C mJ C/W C DEVICE MARKING 2N6VL (1) Mounted on G10/FR4 glass epoxy board using minimum recommended footprint. ORDERING INFORMATION Device MMDF2N06VLR1 MMDF2N06VLR2 Reel Size 7 13 Tape Width 12mm embossed tape 12mm embossed tape Quantity 500 2500 This document contains information on a new product. Specifications and information herein are subject to change without notice. E-FET and TMOS V are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc. (c)Motorola TMOS Power MOSFET Transistor Device Data Motorola, Inc. 1996 1 MMDF2N06VL ELECTRICAL CHARACTERISTICS (TA = 25C unless otherwise noted) Characteristic OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage (VGS = 0 Vdc, ID = 0.25 mAdc) Temperature Coefficient (Positive) Zero Gate Voltage Drain Current (VDS = 60 Vdc, VGS = 0 Vdc) (VDS = 60 Vdc, VGS = 0 Vdc, TJ = 150C) Gate-Body Leakage Current (VGS = 15 Vdc, VDS = 0 Vdc) ON CHARACTERISTICS(1) Gate Threshold Voltage (VDS = VGS, ID = 250 Adc) Threshold Temperature Coefficient (Negative) Static Drain-to-Source On-Resistance (VGS = 5.0 Vdc, ID = 2.5 Adc) Drain-to-Source On-Voltage (VGS = 5.0 Vdc, ID = 2.5 Adc) (VGS = 5.0 Vdc, ID = 1.25 Adc, TJ = 150C) Forward Transconductance (VDS = 15 Vdc, ID = 1.25 Adc) DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Transfer Capacitance SWITCHING CHARACTERISTICS(2) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Gate Charge (VDS = 48 Vdc, ID = 2.5 Adc, VGS = 5.0 Vdc) (VDD = 30 Vdc, ID = 2.5 Adc, VGS = 5.0 Vdc, RG = 9.1 ) td(on) tr td(off) tf QT Q1 Q2 Q3 SOURCE-DRAIN DIODE CHARACTERISTICS Forward On-Voltage(1) (IS = 2.5 Adc, VGS = 0 Vdc) (IS = 2.5 Adc, VGS = 0 Vdc, TJ = 150C) Reverse Recovery Time (IS = 2.5 Adc, VGS = 0 Vdc, dIS/dt = 100 A/s) Reverse Recovery Storage Charge (1) Pulse Test: Pulse Width 300 s, Duty Cycle 2%. (2) Switching characteristics are independent of operating junction temperature. VSD -- -- -- -- -- -- -- -- 10 30 32 28 11 1.5 3.8 3.5 20 60 60 60 20 -- -- -- nC ns (VDS = 25 Vdc, VGS = 0 Vdc, f = 1.0 MHz) Ciss Coss Crss -- -- -- 340 110 27 480 150 50 pF VGS(th) 1.0 -- RDS(on) -- VDS(on) -- -- gFS 1.0 -- -- 3.0 0.4 0.3 -- Mhos 0.12 0.13 Vdc 1.5 3.0 2.0 -- Vdc mV/C Ohm V(BR)DSS 60 -- IDSS -- -- IGSS -- -- -- -- 10 100 100 nAdc -- 66 -- -- Vdc mV/C Adc Symbol Min Typ Max Unit -- -- -- -- -- -- 0.84 0.67 49 32 17 0.08 1.2 -- -- -- -- -- Vdc trr ta tb QRR ns C 2 Motorola TMOS Power MOSFET Transistor Device Data MMDF2N06VL PACKAGE DIMENSIONS -A- B M 8 5 X 45 _ J 1 4 4X -B- M_ G F NOTES: 1. DIMENSIONS A AND B ARE DATUMS AND T IS A DATUM SURFACE. 2. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 3. DIMENSIONS ARE IN MILLIMETER. 4. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 5. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 6. DIMENSION D DOES NOT INCLUDE MOLD PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A B C D F G J K M P R MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.18 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 P 0.25 (0.010) M -T- 8X C SEATING PLANE D 0.25 (0.010) M K TB S A S R CASE 751-05 SO-8 ISSUE P STYLE 11: PIN 1. 2. 3. 4. 5. 6. 7. 8. SOURCE 1 GATE 1 SOURCE 2 GATE 2 DRAIN 2 DRAIN 2 DRAIN 1 DRAIN 1 Motorola TMOS Power MOSFET Transistor Device Data 3 MMDF2N06VL Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. How to reach us: USA / EUROPE / Locations Not Listed: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. 1-800-441-2447 or 602-303-5454 MFAX: RMFAX0@email.sps.mot.com - TOUCHTONE 602-244-6609 INTERNET: http://Design-NET.com JAPAN: Nippon Motorola Ltd.; Tatsumi-SPD-JLDC, 6F Seibu-Butsuryu-Center, 3-14-2 Tatsumi Koto-Ku, Tokyo 135, Japan. 03-81-3521-8315 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852-26629298 4 MMDF2N06VL/D Motorola TMOS Power MOSFET Transistor Device Data *MMDF2N06VL/D* |
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